US 7,517,787 B2
C4 joint reliability
Sairam Agraharam, Phoenix, Ariz. (US); Carlton Hanna, Chandler, Ariz. (US); Dongming He, Gilbert, Ariz. (US); Vasudeva Atluri, Scottsdale, Ariz. (US); Debendra Mallik, Chandler, Ariz. (US); Matthew Escobido, Quezon (Philippines); and Sujit Sharan, Gilbert, Ariz. (US)
Assigned to Intel Corporation, Santa Clara, Calif. (US)
Filed on Mar. 22, 2005, as Appl. No. 11/87,180.
Prior Publication US 2006/0214292 A1, Sep. 28, 2006
Int. Cl. H01L 23/48 (2006.01)
U.S. Cl. 438—613  [438/612; 257/737] 7 Claims
OG exemplary drawing
 
1. A method, comprising:
fabricating a die bump on a die, the die bump being shaped and dimensioned to at least reduce the flow of solder material, used to attach the die bump to a package substrate, towards an under bump metallurgy (UBM) layer located below the die bump, wherein the die bump has a frusto-conical shape located above the die and extending beyond a topmost surface of the die, wherein a distal end of the frusto-conical shape is located away from the UBM layer and is remote from a near end of the frusto-conical shape, the near end of the frusto-conical shape being in contact with the UBM layer and wider than an opening in a passivation layer within which the UBM layer is formed wherein the distal end of the frusto-conical shape located away from the UBM layer has a wider cross-section than the near end of the frusto-conical shape.