| US 7,517,748 B2 | ||
| Method of fabricating trench-constrained isolation diffusion for semiconductor devices | ||
| Richard K. Williams, Cupertino, Calif. (US); Michael E. Cornell, Campbell, Calif. (US); and Wai Tien Chan, Hong Kong (China) | ||
| Assigned to Advanced Analogic Technologies, Inc., Santa Clara, Calif. (US); and Advanced Analogic Technologies (Hong Kong) Limited, Hong Kong (China) | ||
| Filed on Aug. 15, 2005, as Appl. No. 11/203,789. | ||
| Application 11/203789 is a division of application No. 10/218678, filed on Aug. 14, 2002, granted, now 6,943,426. | ||
| Prior Publication US 2005/0272230 A1, Dec. 08, 2005 | ||
| Int. Cl. H01L 21/8238 (2006.01) | ||
| U.S. Cl. 438—207 | 8 Claims |

| 1. A method of fabricating an isolation diffusion for semiconductor devices comprising:
providing a semiconductor substrate;
implanting a dopant into the substrate;
forming an epitaxial layer on the substrate;
causing the dopant in the substrate to diffuse upward into the epitaxial layer so as to form a buried layer;
forming a pair of trenches in said epitaxial layer, each of said trenches having a bottom located in the epitaxial layer above
an interface between the epitaxial layer and the substrate, the trenches defining a mesa between said trenches, said mesa
being located over said buried layer;
substantially filling said trenches with a dielectric material;
after forming and substantially filling said trenches, introducing a dopant into the mesa; and
causing said dopant in said mesa to diffuse downward and said buried layer to diffuse upward such that said dopant in said
mesa merges with said buried layer to form said isolation diffusion, said isolation diffusion extending across said mesa so
as to abut at least a portion of a sidewall of each of said trenches.
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