| US 7,354,805 B2 | ||
| Method of making electrically programmable fuse for silicon-on-insulator (SOI) technology | ||
| Chandrasekharan Kothandaraman, Hopewell Junction, N.Y. (US); and Edward P. Maciejewski, Wappingers Falls, N.Y. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Apr. 25, 2007, as Appl. No. 11/739,979. | ||
| Application 11/739979 is a division of application No. 10/904681, filed on Nov. 23, 2004, granted, now 7,242,072. | ||
| Prior Publication US 2007/0190697 A1, Aug. 16, 2007 | ||
| Int. Cl. H01L 21/82 (2006.01) | ||
| U.S. Cl. 438—132 [438/215; 438/281; 438/333; 257/665; 257/538; 257/E23.149] | 9 Claims |
| 1. A method of manufacturing an electrically programmable fuse comprising the steps of:
providing a wafer having a crystalline semiconductor layer on an insulating layer, said insulating layer formed on a semiconductor
substrate;
patterning said crystalline semiconductor layer to form an elongated crystalline semiconductor body disposed atop said insulating
layer;
forming a fill-in dielectric on said insulating layer so as to substantially surround the sidewalls of said elongated crystalline
semiconductor body without covering the upper surface of said elongated crystalline semiconductor body;
depositing a capping layer over the upper surface of said elongated crystalline semiconductor body and said fill-in dielectric;
patterning contact openings through said capping layer to expose the upper surface of said elongated crystalline semiconductor
body at opposing ends of said elongated crystalline semiconductor body; and
filling said contact openings with a conductive material.
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