| US 7,516,394 B2 | ||
| Method and apparatus for combined encoder/syndrome computer with programmable parity level | ||
| Jonathan James Ashley, Los Gatos, Calif. (US); and Clifton Williamson, Saratoga, Calif. (US) | ||
| Assigned to Agere Systems Inc., Allentown, Pa. (US) | ||
| Filed on Mar. 14, 2005, as Appl. No. 11/79,634. | ||
| Prior Publication US 2006/0212783 A1, Sep. 21, 2006 | ||
| Int. Cl. H03M 13/00 (2006.01) | ||
| U.S. Cl. 714—784 | 20 Claims |
| 15. An error correction method, comprising:
generating check symbols during an encoding operation; and
generating error syndromes during a decoding operation, wherein both generating steps employ a circuit comprising a plurality
of subfilters grouped into a multiple degree polynomial filter, said plurality being less than a maximum number of symbols
of redundancy.
|