| US 7,516,390 B2 | ||
| LDPC (Low Density Parity Check) coding and interleaving implemented in MIMO communication systems | ||
| Ba-Zhong Shen, Irvine, Calif. (US); Christopher J. Hansen, Sunnyvale, Calif. (US); Joseph Paul Lauer, North Reading, Mass. (US); Kelly Brian Cameron, Irvine, Calif. (US); Tak K. Lee, Irvine, Calif. (US); and Hau Thien Tran, Irvine, Calif. (US) | ||
| Assigned to Broadcom Corporation, Irvine, Calif. (US) | ||
| Filed on Nov. 02, 2005, as Appl. No. 11/264,998. | ||
| Claims priority of provisional application 60/642689, filed on Jan. 10, 2005. | ||
| Claims priority of provisional application 60/674084, filed on Apr. 22, 2005. | ||
| Claims priority of provisional application 60/675346, filed on Apr. 27, 2005. | ||
| Claims priority of provisional application 60/718449, filed on Sep. 19, 2005. | ||
| Prior Publication US 2006/0156169 A1, Jul. 13, 2006 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. H03M 13/00 (2006.01) | ||
| U.S. Cl. 714—755 [714/786; 714/784; 714/756] | 29 Claims |
| 1. An apparatus, comprising:
an LDPC (Low Density Parity Check) encoder that is operable to encode at least one information bit using a generator matrix
of a GRS-based irregular LDPC code thereby generating an LDPC code block, wherein the GRS-based irregular LDPC code is generated
using GRS (Generalized Reed-Solomon) code;
an interleaver that is operable to perform bit to symbol interleaving on the LDPC code block thereby generating a plurality
of x-bit labels, wherein x is an integer;
a DEMUX (demultiplexor) that is operable to partition the plurality of x-bit labels to a plurality of streams; and
a plurality of symbol mappers that is operable to map versions of the plurality of x-bit labels to at least one constellation
that has a corresponding mapping thereby generating a plurality of sequences of discrete-valued modulation symbols, wherein
one symbol mapper corresponds to each stream of the plurality of streams.
|