| US 7,516,358 B2 | ||
| Tuning core voltages of processors | ||
| Juerg Haefliger, Cupertino, Calif. (US); William F. Bruckert, Cupertino, Calif. (US); and James S. Klecka, Austin, Tex. (US) | ||
| Assigned to Hewlett-Packard Development Company, L.P., Houston, Tex. (US) | ||
| Filed on Dec. 20, 2005, as Appl. No. 11/312,201. | ||
| Prior Publication US 2007/0174746 A1, Jul. 26, 2007 | ||
| Int. Cl. G06F 11/00 (2006.01) | ||
| U.S. Cl. 714—10 [714/11; 714/47; 700/2; 700/186] | 22 Claims |
| 1. A method for tuning plural processors, comprising:
varying core voltages of plural processors operating in lockstep to determine an operating range for each of the plural processors;
adjusting the core voltages of the plural processors within the operating range to tune the plural processors; and
adjusting the core voltages of the plural processors to increase performance of the plural processors while the plural processors
operate in cycle-by-cycle lockstep, wherein the core voltages of the plural processors are raised and lowered at predetermined
increments and held at voltages for predetermined dwell times to determine if an anomaly occurs.
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