| US 7,516,247 B2 | ||
| Avoiding silent data corruption and data leakage in a virtual environment with multiple guests | ||
| Mark D. Hummel, Franklin, Mass. (US); Andrew W. Lueck, Austin, Tex. (US); Geoffrey S. Strongin, Austin, Tex. (US); Mitchell Alsup, Austin, Tex. (US); and Michael J. Haertel, Sunnyvale, Calif. (US) | ||
| Assigned to Advanced Micro Devices, Inc., Sunnyvale, Calif. (US) | ||
| Filed on Aug. 11, 2006, as Appl. No. 11/503,391. | ||
| Claims priority of provisional application 60/707629, filed on Aug. 12, 2005. | ||
| Claims priority of provisional application 60/759826, filed on Jan. 17, 2006. | ||
| Prior Publication US 2007/0038840 A1, Feb. 15, 2007 | ||
| Int. Cl. G06F 3/00 (2006.01); G06F 5/00 (2006.01); G06F 13/00 (2006.01) | ||
| U.S. Cl. 710—15 [710/5; 710/6; 710/58] | 18 Claims |
| 1. A method comprising:
receiving a completion wait command in an input/output memory management unit (IOMMU), wherein the IOMMU is configured to
provide address translation and memory protection for memory requests sourced by one or more input/output (I/O) devices, and
wherein the completion wait command is defined to ensure that one or more preceding invalidation commands that were included
in a sequence of commands prior to the completion wait command are completed by the IOMMU prior to a completion of the completion
wait command;
the IOMMU receiving a read response corresponding to each outstanding memory read operation that depends on a translation
entry that is invalidated by the preceding invalidation commands;
the IOMMU transmitting one or more operations upstream to ensure that each memory write operation that depends on the translation
table entry that is invalidated by the preceding invalidation commands has at least reached a bridge to a coherent fabric
in the computer system; and
the IOMMU completing the completion wait command subsequent to completing the one or more invalidation commands, subsequent
to receiving the read response, and subsequent to transmitting the one or more operations.
|