US 7,515,651 B1
Parallel processing for programmable wideband digital modulation
Osama Sami Haddadin, Salt Lake City, Utah (US); L. Andrew Gibson, Jr., Riverton, Utah (US); and David Scott Nelson, Salt Lake City, Utah (US)
Assigned to L3 Communications Corporation, New York, N.Y. (US)
Filed on Aug. 07, 2003, as Appl. No. 10/637,946.
Int. Cl. H04L 27/20 (2006.01)
U.S. Cl. 375—308  [375/298; 332/103] 5 Claims
OG exemplary drawing
 
1. A circuit for up-sampling a digital data stream comprising:
a system clock defining a clock period;
a polyphase Nyquist filter, having as parallel inputs during one clock period, M in-phase symbols and M quadrature symbols derived from a data stream, and outputting in parallel during one system clock period, k samples from each symbol, wherein k is an integer greater than one and M is an integer greater than or equal to one;
an oscillator defining Mk first carrier wave outputs and Mk second carrier wave outputs, wherein each first carrier wave output is in quadrature relation to a corresponding second carrier wave output;
a plurality of Mk in-phase multipliers, each in-phase multiplier having an input coupled to a first carrier wave output of the oscillator and an input coupled to an output of the filter corresponding to an in-phase symbol;
a plurality of Mk quadrature multipliers, each quadrature multiplier having an input coupled to a second carrier wave output of the oscillator and an input coupled to an output of the filter corresponding to a quadrature symbol;
a plurality of adders, each adder coupled to an output of an in-phase multiplier and an input coupled to an output of a quadrature multiplier; and
a plurality of filter adders each having an input coupled to an output of at least two polyphase filter components that are defined by the Nyquist filter.