US 7,514,968 B1
H-tree driver circuitry
Tin H. Lai, San Jose, Calif. (US); Wilson Wong, San Francisco, Calif. (US); Sergey Shumarayev, Los Altos Hills, Calif. (US); and Tim Tri Hoang, San Jose, Calif. (US)
Assigned to Altera Corporation, San Jose, Calif. (US)
Filed on Apr. 10, 2007, as Appl. No. 11/786,295.
Int. Cl. H03K 3/00 (2006.01)
U.S. Cl. 327—108  [327/540; 326/83] 15 Claims
OG exemplary drawing
 
1. Differential output driver circuitry comprising:
a pull-up current source connected between a power supply voltage source and a first node;
a pull-down current source connected between a second node and ground;
first and second transistors connected in series between the first and second nodes;
third and fourth transistors connected in series between the first and second nodes;
a first output node connected between the first and second transistors;
a second output node connected between the third and fourth transistors;
first and second resistors connected in series between the first and second output nodes; and
a common-mode voltage source connected between the first and second resistors, wherein the pull-up current source comprises:
fifth and sixth transistors connected in series between the power supply voltage source and the first node;
seventh and eighth transistors connected in series between the power supply voltage source and a first reference current source;
a first connection that connects together a gate terminal of the seventh transistor, a source terminal of the eighth transistor, and a gate terminal of the fifth transistor; and
a second connection that connects together a first bias voltage source, a gate terminal of the eighth transistor, and a gate terminal of the sixth transistor.