	US 7,514,950 B2
	Semiconductor device testing apparatus and device interface board
Hiroshi Ezoe, Tokyo (Japan)
Assigned to Advantest Corporation, Tokyo (Japan)
Filed on Apr. 07, 2008, as Appl. No. 12/82,048.
Application 12/082048 is a division of application No. 10/569902, granted, now 7,372,287, previously published as PCT/JP2004/019639, filed on Dec. 28, 2004.
Claims priority of application No. 2004-071814 (JP), filed on Mar. 12, 2004.
Prior Publication US 2008/0191731 A1, Aug. 14, 2008
Int. Cl. G01R 31/28 (2006.01); G01R 31/02 (2006.01)

U.S. Cl. 324—765 [324/755]

3 Claims

1. A semiconductor device testing apparatus for testing a first type semiconductor device having a first external terminal group and a second external terminal group and operatingly using a part of the first external terminal group, a second type semiconductor device having the same external terminal array as that of the first type semiconductor device and operatingly using all of the first external terminal group, and a third type semiconductor device having the same external terminal array as those of the first and second type semiconductor devices and operatingly using all of the first and second external terminal groups, characterized in that:

a device interface board is provided with a first contact instrument and a second contact instrument each having a first contact terminal group corresponding to the first external terminal group and a second contact terminal group corresponding to the second external terminal group so that any of the first, second, and third type semiconductor devices can be connected to the first contact instrument and the second contact instrument;

sets of two first branching lines are connected between the contact terminals of the first contact terminal group of the first contact instrument and corresponding contact terminals of the second contact terminal group of the second contact instrument, respectively, each said two first branching lines having a branching point;

sets of two second branching lines are connected between the contact terminals of the first contact terminal group of the first contact instrument and corresponding contact terminals of the second contact terminal group of the second contact instrument, respectively, each said two first branching lines having a branching point;

each one of the branching points of the respective sets of two first branching lines is connected to each said driver output pin of a corresponding IO channel of the first IO channel group;

each one of the branching points of the respective sets of two second branching lines is connected to each said comparator input pin of a corresponding IO channel of the second IO channel group provided in pin electronics in association with the second contact instrument; and

each contact terminal of the first contact terminal group of the second contact instrument is connected to each driver output pin and each comparator input pin of the corresponding IO channel of the second IO channel group using additional connection lines.