| US 7,514,949 B2 | ||
| Testing method detecting localized failure on a semiconductor wafer | ||
| Joong-Wuk Kang, Chungcheongnam-do (Korea, Republic of); and Kwang-Yung Cheong, Chungcheongnam-do (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
| Filed on Mar. 13, 2006, as Appl. No. 11/373,339. | ||
| Claims priority of application No. 10-2005-0073497 (KR), filed on Aug. 10, 2005. | ||
| Prior Publication US 2007/0035322 A1, Feb. 15, 2007 | ||
| Int. Cl. G01R 31/26 (2006.01) | ||
| U.S. Cl. 324—765 | 26 Claims |
| 1. A method adapted to testing a wafer comprising semiconductor chips, the method comprising:
generating a wafer map indicating first locations of failed semiconductor chips;
generating a filtered wafer map indicating second locations of filtered failed semiconductor chips from the wafer map by applying
a spatial filter of defined size to the wafer map to generate the filtered wafer map;
calculating a defect index value from the filtered wafer map; and,
comparing the defect index value to an upper critical limit.
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