| US 7,514,802 B2 | ||
| Wiring board | ||
| Michinari Tetani, Osaka (Japan); Takayuki Tanaka, Osaka (Japan); Hiroyuki Imamura, Osaka (Japan); Nozomi Shimoishizaka, Kyoto (Japan); and Kouichi Nagao, Kyoto (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on Sep. 13, 2006, as Appl. No. 11/531,381. | ||
| Claims priority of application No. 2005-287853 (JP), filed on Sep. 30, 2005. | ||
| Prior Publication US 2007/0075426 A1, Apr. 05, 2007 | ||
| Int. Cl. H01L 23/544 (2006.01) | ||
| U.S. Cl. 257—797 [438/400; 438/401; 438/462] | 16 Claims |
| 1. A wiring board comprising:
a flexible insulating base;
a plurality of conductor wirings aligned on the flexible insulating base; and
bump electrodes provided respectively in end portions of the plurality of conductor wirings in a region where a semiconductor
chip is to be placed;
the wiring board being configured so that the semiconductor chip is mounted on the conductor wirings by bonding electrode
pads formed on the semiconductor chip to the bump electrodes;
wherein an auxiliary conductor wiring is formed on the insulating base, an auxiliary bump electrode is formed on the auxiliary
conductor wiring, and a solder resist layer is formed so as to coat the insulating base including the conductor wirings and
the auxiliary conductor wiring,
a plurality of the auxiliary conductor wirings are arranged in parallel, the auxiliary bump electrodes arc formed respectively
on the plurality of the auxiliary conductor wirings so as to be aligned in parallel with each other, and the auxiliary bump
electrodes that are adjacent to each other are joined,
the solder resist layer has a register opening in an end region of the auxiliary conductor wiring where the auxiliary bump
electrode is formed, and the auxiliary bump electrode is exposed from the register opening, so that a register mark is formed
of the plurality of the auxiliary bump electrodes in the register opening, and
the electrode pads formed on the semiconductor chip can be registered with respect to the bump electrodes on the conductor
wirings by positioning the semiconductor chip through image recognition with reference to the register mark.
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