a substrate;

a semiconductor region provided in the substrate;

a group of transistors including a plurality of metal insulator semiconductor (MIS) transistors and provided in the semiconductor region, the MIS transistors including a plurality of gate electrodes which extend in a first direction and are provided on the semiconductor region via gate insulation films; an insulation film provided on the group of transistors; and

a first contact layer and a second contact layer extending in the first direction and provided on the semiconductor region at opposite sides of the group of transistors, each of the first contact layer and the second contact layer having a rectangular planar configuration, wherein the first and second contact layers have a length substantially equal to a channel width of the MIS transistors.