| US 7,514,754 B2 | ||
| Complementary metal-oxide-semiconductor transistor for avoiding a latch-up problem | ||
| Shih-Kuei Ma, Hsinchu (Taiwan); Chung-Yeh Lee, Hsinchu (Taiwan); Chun-Ying Yeh, Hsinchu (Taiwan); and Ker-Hsiao Huo, Hsinchu (Taiwan) | ||
| Assigned to Episil Technologies Inc., Hsinchu (Taiwan) | ||
| Filed on Jan. 19, 2007, as Appl. No. 11/624,698. | ||
| Prior Publication US 2008/0173951 A1, Jul. 24, 2008 | ||
| Int. Cl. H01L 27/092 (2006.01) | ||
| U.S. Cl. 257—370 [257/337; 257/343; 257/372; 257/E27.063; 257/E27.064] | 12 Claims |
| 1. A semiconductor device, comprising:
a substrate of a first conductive type;
a first epitaxial layer of the first conductive type, disposed on the substrate;
a second epitaxial layer of a second conductive type, disposed on the first epitaxial layer;
a first sinker of the first conductive type, disposed in the first epitaxial layer and the second epitaxial layer, and extending
from the substrate to an upper surface of the second epitaxial layer and defining a first area from the first epitaxial layer
and the second epitaxial layer;
a second sinker of the second conductive type, disposed in the second epitaxial layer extending from the first epitaxial layer
to the upper surface of the second epitaxial layer and defining a second area from the second epitaxial layer of the first
area;
an active device, disposed in the second area;
a first buried layer of the first conductive type, disposed between the first epitaxial layer and the substrate in the first
area, and connected to the first sinker; and
a second buried layer of the second conductive type, disposed between the second epitaxial layer and the first epitaxial layer
in the second area, and connected to the second sinker.
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