| US 7,514,741 B2 | ||
| Nonvolatile semiconductor memory device and related method | ||
| Seung-Jun Lee, Suwon-si (Korea, Republic of); and Dong-Gyun Han, Yongin-si (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonngi-do (Korea, Republic of) | ||
| Filed on Jul. 24, 2006, as Appl. No. 11/491,194. | ||
| Claims priority of application No. 10-2005-0068566 (KR), filed on Jul. 27, 2005. | ||
| Prior Publication US 2007/0023823 A1, Feb. 01, 2007 | ||
| Int. Cl. H01L 27/115 (2006.01) | ||
| U.S. Cl. 257—316 [257/E27.103] | 5 Claims |
| 1. A nonvolatile memory device comprising:
a device isolation pattern disposed on a substrate and adjacent to an active region of the substrate, wherein the device isolation
pattern protrudes from the substrate;
a floating gate electrode disposed on the substrate and comprising a U-shaped lower portion, a first L-shaped upper portion
connected to a first side of the U-shaped lower portion, and a second L-shaped upper portion connected to a second side of
the U-shaped lower portion;
a gate interlayer insulating layer formed on the floating gate electrode; and,
a control gate electrode formed on the gate interlayer insulating layer and the device isolation pattern,
wherein the control gate electrode comprises an outer portion disposed outside of the floating gate electrode, and wherein
a bottom surface of the outer portion is disposed lower than a top portion of the active region.
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