a) a first memory device formed on a substrate, the device including:

a semiconductor body elongated in one direction on the substrate, and having a cross section perpendicular to a main surface of the substrate and to the elongated direction, the cross section having a predetermined curvature;

a channel region partially formed on the semiconductor body along the circumference of the semiconductor body;

a tunneling insulating layer disposed on the channel region;

a floating gate disposed on the tunneling insulating layer and electrically insulated from the channel region;

a high dielectric constant material layer disposed on the floating gate;

a metallic control gate disposed on the high dielectric constant material layer and electrically insulated from the floating gate; and

source and drain regions which are adjacent to sides of the metallic control gate and formed on the semiconductor body;

an inter-insulating layer disposed on the first memory device; and

a conductive layer disposed on the inter-insulating layer; and

b) a second memory device formed on the conductive layer, the device including:

a semiconductor body elongated in one direction on the conductive layer, and having a cross section perpendicular to a main surface of the conductive layer and to the elongated direction, the cross section having a predetermined curvature;

a channel region partially formed on the semiconductor body along the circumference of the semiconductor body;

a tunneling insulating layer disposed on the channel region;

a floating gate disposed on the tunneling insulating layer and electrically insulated from the channel region;

a high dielectric constant material layer disposed on the floating gate;

a metallic control gate disposed on the high dielectric constant material layer and electrically insulated from the floating gate; and

source and drain regions that are adjacent to sides of the metallic control gate and formed on the semiconductor body.