US 7,514,637 B1
Electroplating solution, method for fabricating multilayer printed wiring board using the solution, and multilayer printed wiring board
Honchin En, Gifu (Japan)
Assigned to Ibiden Co., Ltd., Gifu (Japan)
Appl. No. 10/48,852
PCT Filed Jul. 04, 2000, PCT No. PCT/JP00/04418
§ 371(c)(1), (2), (4) Date Apr. 11, 2002,
PCT Pub. No. WO01/11932, PCT Pub. Date Feb. 15, 2001.
Claims priority of application No. 11/224143 (JP), filed on Aug. 06, 1999; application No. 2000/156877 (JP), filed on May 26, 2000; application No. 2000/156878 (JP), filed on May 26, 2000; application No. 2000/194619 (JP), filed on Jun. 28, 2000; and application No. 2000/194620 (JP), filed on Jun. 28, 2000.
Int. Cl. H05K 1/03 (2006.01); H05K 1/09 (2006.01)
U.S. Cl. 174—256  [174/257; 174/262; 29/846] 10 Claims
OG exemplary drawing
 
1. A method for manufacturing a multilayer printed circuit board of the present invention, characterized by containing at least the following processes (a) to (e):
(a) a process of forming a resin insulating layer having an opening part for a via-hole by exposure and development treatment or laser treatment;
(b) a process of forming a metal layer comprising at least one element selected from the group consisting of Cu, Ni, P, Pd, Co and W on the surface of the resin insulating layer and the opening part for a via-hole;
(c) a process of forming a plating resist on said metal layer;
(d) a process of forming an electroplating film on a part un-coated with said plating resist using an electroplating solution containing: 50 to 300 g/L of copper sulfate, 30 to 200 g/L of sulfuric acid, 25 to 90 mg/L of chlorine ion, and 1 to 1000 mg/L of an additive comprising at least a leveling agent and a brightener; and
(e) a process of forming a conductor circuit by etching the metal layer existing under said plating resist after said plating resist is separated.