| US 7,514,334 B2 | ||
| Thin film plate phase change RAM circuit and manufacturing method | ||
| Shih Hung Chen, Elmsford, N.Y. (US); and Hsiang Lan Lung, Elmsford, N.Y. (US) | ||
| Assigned to Macronix International Co., Ltd., Hsinchu (Taiwan) | ||
| Filed on May 29, 2007, as Appl. No. 11/754,559. | ||
| Application 11/754559 is a division of application No. 11/155202, filed on Jun. 17, 2005, granted, now 7,238,994. | ||
| Prior Publication US 2007/0224726 A1, Sep. 27, 2007 | ||
| Int. Cl. H01L 21/20 (2006.01); H01L 21/8234 (2006.01); H01L 21/336 (2006.01) | ||
| U.S. Cl. 438—385 [438/238; 438/294; 257/E21.004] | 5 Claims |
| 1. A method for manufacturing a memory device, comprising:
forming circuitry in a substrate having a top surface, the circuitry including an array of contacts on the top surface of
the substrate;
forming an electrode layer on the substrate, the electrode layer having a top surface, the electrode layer including an array
of electrode pairs, including respective first electrodes and second electrodes, and respective insulating members between
the first and second electrodes, wherein the second electrodes contact corresponding contacts in the array of contacts, and
wherein the first and second electrodes and the insulating members extend to the top surface of the electrode layer, and the
insulating members have widths between the first and second electrodes at the top surface;
forming an array of bridges of memory material on the top surface of the electrode layer, the array of bridges including bridges
for each of the electrode pairs in the array of electrode pairs, contacting the respective first and second electrodes and
extending across the respective insulating members, the bridges comprising films of memory material having a first side and
a second side and contacting the respective first and second electrodes on the first side, the bridges defining inter-electrode
paths between the first and second electrodes across the insulating members having path lengths defined by the widths of the
insulating members, wherein the memory material has at least two solid phases; and
forming a patterned conductive layer over said bridge, and forming an array of contacts between said first electrodes in the
array of electrode pairs and said patterned conductive layer.
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