	US 7,514,294 B2
	Semiconductor device and a manufacturing method of the same
Tomoko Higashino, Tokyo (Japan); Chuichi Miyazaki, Tokyo (Japan); and Yoshiyuki Abe, Tokyo (Japan)
Assigned to Renesas Technology Corp., Tokyo (Japan)
Filed on Aug. 09, 2006, as Appl. No. 11/500,945.
Claims priority of application No. 2005-231946 (JP), filed on Aug. 10, 2005.
Prior Publication US 2007/0037321 A1, Feb. 15, 2007
Int. Cl. H01L 21/00 (2006.01)

U.S. Cl. 438—113 [438/118; 257/E21.596]

6 Claims

1. A manufacturing method of a semiconductor device, comprising the steps of:

(a) preparing a wiring substrate which has a main surface and a back surface which become an opposite side mutually along a thickness direction;

(b) mounting a first chip over the main surface of the wiring substrate; and

(c) piling up a second chip over the first chip, and adheres the second chip over the first chip by an adhesive layer of solid state of the back surface;

wherein a formation step of the second chip comprises the steps of:

preparing a wafer which has a main surface and a back surface which become an opposite side mutually along a thickness direction;

forming an element in the main surface of the wafer;

forming a wiring layer over the main surface of the wafer;

making the wafer thin;

forming a reforming area used as a division origin of the wafer in a later wafer cutting step by irradiating a laser along a chip separating region of the wafer, putting together a condensing point with an inside of the wafer;

applying a binding material of liquid state to the back surface of the wafer by a spin coating method, and forming the adhesive layer of the solid state over the back surface of the wafer; and

cutting the wafer with the reforming area as a starting point, and obtaining the second chip which has the adhesive layer of the solid state over the back surface.