| US 7,513,035 B2 | ||
| Method of integrated circuit packaging | ||
| Seah Sun Too, San Jose, Calif. (US); Mohammad Khan, San Jose, Calif. (US); James Hayward, Santa Clara, Calif. (US); and Jacquana Diep, San Jose, Calif. (US) | ||
| Assigned to Advanced Micro Devices, Inc., Sunnyvale, Calif. (US) | ||
| Filed on Jun. 07, 2006, as Appl. No. 11/422,807. | ||
| Prior Publication US 2007/0284144 A1, Dec. 13, 2007 | ||
| Int. Cl. H05K 3/30 (2006.01); H05K 3/34 (2006.01) | ||
| U.S. Cl. 29—832 [29/825; 29/833; 29/840; 438/121] | 16 Claims |
| 1. A method of packaging an integrated circuit, comprising:
coupling a first side of an integrated circuit to a substrate, the integrated circuit having a second and opposite side with
a metallization stack bonded thereto;
placing an indium film proximate the metallization stack;
coupling a lid having a convex surface to the substrate; and
reflowing the indium film to establish a metallurgical bond with the metallization stack and the convex surface, the convex
surface applying pressure to the indium film during the reflow.
|