US 7,353,442 B2
On-chip and at-speed tester for testing and characterization of different types of memories
Swapnil Bahl, New Delhi (India); and Balwant Singh, Greater Noida (India)
Assigned to STMicroelectronics Pvt. Ltd., Uttar Pradesh (India)
Filed on Apr. 08, 2005, as Appl. No. 11/102,556.
Claims priority of application No. 695/DEL/2004 (IN), filed on Apr. 08, 2004.
Prior Publication US 2005/0246602 A1, Nov. 03, 2005
Int. Cl. G01R 31/28 (2006.01)
U.S. Cl. 714—733  [714/25; 714/30; 714/724; 714/718; 714/734; 714/737; 714/742; 365/201] 20 Claims
OG exemplary drawing
 
1. For use in testing an integrated circuit device comprising a memory-under-test and a localized signal generator, a testing apparatus comprising:
a centralized flow controller having an interface to an external device, wherein the centralized flow controller is configured for communicating with the localized signal generator,
wherein the centralized flow controller is configured for causing the localized signal generator to test the memory-under-test in accordance with a signal received from the external device via the interface, the signal indicating a memory type of the memory-under-test.