| US 7,511,709 B2 | ||
| Display device | ||
| Jun Koyama, Sagamihara (Japan); Keitaro Imai, Yokohama (Japan); Shinji Maekawa, Atsugi (Japan); Makoto Furuno, Atsugi (Japan); Osamu Nakamura, Atsugi (Japan); and Shunpei Yamazaki, Setagaya (Japan) | ||
| Assigned to Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (Japan) | ||
| Filed on Jul. 07, 2004, as Appl. No. 10/884,945. | ||
| Claims priority of application No. 2003-277119 (JP), filed on Jul. 18, 2003. | ||
| Prior Publication US 2005/0012887 A1, Jan. 20, 2005 | ||
| Int. Cl. G09G 5/00 (2006.01) | ||
| U.S. Cl. 345—206 [345/100] | 20 Claims |
| 1. A display device comprising:
a plurality of scan lines provided in a first conductive material over a substrate;
a plurality of pixels over the substrate; and
a scan line driver circuit over the substrate,
wherein the scan line driver circuit comprises a shift register and a level shifter,
the shift register is connected to a first power supply terminal;
the level shifter is connected to a second power supply terminal,
each of the pixels and the scan line driver circuit comprises:
a gate electrode comprising the first conductive material over the substrate;
a gate insulating film over the gate electrode;
a lamination film over the substrate; and
a second conductive layer over the lamination film,
the lamination film comprising:
a first semiconductor layer comprising semi-amorphous semiconductor formed over the gate electrode with the gate insulating
film interposed therebetween;
a second lightly-doped semiconductor layer formed on the first semiconductor layer;
a third semiconductor layer having n-type conductivity formed over the first semiconductor layer with the second lightly-doped
semiconductor layer interposed at least between the first semiconductor layer and the third semiconductor layer,
wherein a voltage of the first power supply terminal is lower than a voltage of the second power supply terminal.
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