| US 7,511,380 B2 | ||
| Semiconductor chip and method manufacturing the same | ||
| Shunpei Yamazaki, Kanagawa-Ken (Japan); Toru Takayama, Kanagawa-Ken (Japan); Junya Maruyama, Kanagawa-Ken (Japan); and Yumiko Ohno, Kanagawa-Ken (Japan) | ||
| Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken (Japan) | ||
| Filed on May 25, 2006, as Appl. No. 11/420,390. | ||
| Application 11/420390 is a continuation of application No. 10/730047, filed on Dec. 09, 2003, granted, now 7,067,926. | ||
| Claims priority of application No. 2002-368947 (JP), filed on Dec. 19, 2002. | ||
| Prior Publication US 2006/0214306 A1, Sep. 28, 2006 | ||
| Int. Cl. H01L 23/48 (2006.01) | ||
| U.S. Cl. 257—777 [257/686] | 28 Claims |
| 1. A semiconductor chip comprising:
a solder ball in contact with a substrate;
a first device formative layer including a first semiconductor device with a thickness of at most 50 μm provided over the
substrate; and
a second device formative layer including a second semiconductor device with a thickness of at most 50 μm formed over the
first device formative layer,
wherein the first semiconductor device and the second semiconductor device are electrically connected through an anisotropic
conductive particle.
|