| US 7,511,346 B2 | ||
| Design of high-frequency substrate noise isolation in BiCMOS technology | ||
| Der-Chyang Yeh, Hsin-Chu (Taiwan); Chuan-Ying Lee, Hsinchu (Taiwan); and Victor P. C. Yeh, Taichung (Taiwan) | ||
| Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (Taiwan) | ||
| Filed on Dec. 27, 2005, as Appl. No. 11/320,255. | ||
| Prior Publication US 2007/0145489 A1, Jun. 28, 2007 | ||
| Int. Cl. H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/062 (2006.01); H01L 31/113 (2006.01); H01L 31/119 (2006.01) | ||
| U.S. Cl. 257—370 [257/41; 257/44] | 19 Claims |
| 1. A semiconductor structure comprising:
a semiconductor substrate of a first conductivity type;
a buried layer of a second conductivity type opposite the first conductivity type substantially in the semiconductor substrate
and underlying a first device region formed of a semiconductor material, wherein the buried layer is heavily doped;
a sinker region of the second conductivity type encircling the first device region and joining the buried layer, wherein the
sinker region is heavily doped;
a deep trench isolation region encircling the sinker region;
a deep guard ring of the first conductivity type encircling the deep trench isolation region, wherein the deep guard ring
extends below a bottom surface of the buried layer, wherein the sinker region and the deep guard ring are AC-grounded; and
a second device region spaced apart from the first device region by at least the sinker region, the deep trench isolation
region and the deep guard ring.
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