| US 7,511,335 B2 | ||
| Non-volatile memory | ||
| Erh-Kun Lai, Hsinchu (Taiwan); Hang-Ting Lue, Hsinchu (Taiwan); Yen-Hao Shih, Hsinchu (Taiwan); and Chia-Hua Ho, Hsinchu (Taiwan) | ||
| Assigned to MACRONIX International Co. Ltd., Hsinchu (Taiwan) | ||
| Filed on May 05, 2006, as Appl. No. 11/429,070. | ||
| Application 11/429070 is a division of application No. 11/018507, filed on Dec. 20, 2004, granted, now 7,067,375. | ||
| Prior Publication US 2006/0205157 A1, Sep. 14, 2006 | ||
| Int. Cl. H01L 29/792 (2006.01) | ||
| U.S. Cl. 257—324 [257/326] | 5 Claims |
| 1. A non-volatile memory, comprising:
a substrate;
a dielectric layer disposed on the substrate;
a conductive layer disposed on the dielectric layer;
an isolation layer disposed on the substrate and adjacent to the conductive layer and the dielectric layer;
a buried bit line disposed in the substrate and underneath the isolation layer;
a tunneling dielectric layer disposed on the substrate and sidewalls of the conductive layer and the isolation layer;
a charge trapping layer disposed on the dielectric layer;
a barrier dielectric layer disposed on the charge trapping layer; and
a word line disposed on the substrate and crisscrossed with the buried bit line,
wherein the tunneling dielectric layer, the charge trapping layer and the barrier dielectric layer are disposed on the substrate
besides the buried bit line.
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