| US 7,511,297 B2 | ||
| Phase change memory device and method of fabricating the same | ||
| Jae-Hoon Jang, Gyeonggi-do (Korea, Republic of); Ki-Nam Kim, Seoul (Korea, Republic of); and Soon-Moon Jung, Gyeonggi-do (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
| Filed on Sep. 14, 2007, as Appl. No. 11/855,952. | ||
| Claims priority of application No. 10-2006-0089318 (KR), filed on Sep. 14, 2006. | ||
| Prior Publication US 2008/0111121 A1, May 15, 2008 | ||
| Int. Cl. H01L 29/08 (2006.01); H01L 21/00 (2006.01) | ||
| U.S. Cl. 257—42 [257/68; 257/44; 257/109; 257/910; 257/E31.008; 257/E31.029; 257/E29.087; 257/E29.327; 257/E21.053; 257/E21.456; 438/84; 438/95; 438/102; 438/255] | 26 Claims |
| 1. A semiconductor device, comprising:
a diode formed on a semiconductor substrate, the diode comprising:
a first conductor pattern of a first conductivity type and having an inner sidewall defining a structure; and
a second conductor pattern directly on an electrically connected to the inner sidewall of the first conductor pattern, thereby
being the diode;
a phase change layer above and electrically connected to the second conductor pattern via a bottom electrode; and
a top electrode on and connected to the phase change layer.
|