| US 7,350,120 B2 | ||
| Buffered memory module and method for testing same | ||
| Jeong-Hyeon Cho, Seoul (Korea, Republic of); Byung-Se So, Seongnam (Korea, Republic of); and Jae-Jun Lee, Yongin (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
| Filed on Apr. 28, 2004, as Appl. No. 10/833,322. | ||
| Claims priority of application No. 10-2003-0041261 (KR), filed on Jun. 24, 2003. | ||
| Prior Publication US 2004/0264269 A1, Dec. 30, 2004 | ||
| Int. Cl. G11C 29/00 (2006.01); G01R 31/02 (2006.01) | ||
| U.S. Cl. 714—718 [324/754; 324/763] | 12 Claims |
| 1. A buffered memory module, comprising:
a board including oppositely facing first and second surfaces on respective opposite sides of the board;
a buffer circuit mounted on the first surface of the board;
a plurality of semiconductor memory devices mounted on the first surface of the board and electrically connected to the buffer
circuit; and
a plurality of test pads mounted on the second surface of the board and electrically connected to the buffer circuit;
wherein the plurality of semiconductor memory devices are respectively tested by probing the test pads using extension pins
mounted on a test fixture.
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