| US 7,348,633 B2 | ||
| Hybrid crystallographic surface orientation substrate having one or more SOI regions and/or bulk semiconductor regions | ||
| Junedong Lee, Hopewell Junction, N.Y. (US); Devendra K. Sadana, Pleasantville, N.Y. (US); Dominic J. Schepis, Wappingers Falls, N.Y. (US); and Ghavam G. Shahidi, Yorktown Heights, N.Y. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Nov. 18, 2005, as Appl. No. 11/164,345. | ||
| Prior Publication US 2007/0122634 A1, May 31, 2007 | ||
| Int. Cl. H01L 27/01 (2006.01); H01L 27/12 (2006.01) | ||
| U.S. Cl. 257—347 [257/350] | 15 Claims |
| 1. A substrate for a semiconductor device, the substrate comprising:
a stack including:
a first semiconductor-on-insulator (SOI) wafer having a first semiconductor layer having a first surface orientation, a second
semiconductor layer having a second surface orientation and a first insulator layer therebetween,
at least one second semiconductor-on-insulator (SOI wafer having a third semicoductor layer having a third surface orientation,
a fourth semiconductor layer having a fourth surface orientation and a second insulator layer therebetween, and
an oxidized insulator layer between the first SOI wafer and the at least one second SOI wafer; and
a distal end of the stack including a first SOI region of the first SOI wafer including the first semiconductor layer, and
at least one second region including one of the following:
bulk semiconductor region extending through all insulator layers of the stack, the bulk region having a different thickness
than a thickness of the first semiconductor layer of the first SOI region, and
a second SOI region having at least one of a different semiconductor thickness than a thickness of the first semiconductor
layer and a different surface orientation than the first semiconductor layer,
wherein at least one of the first, second, third and fourth surface orientations is different than the other surface orientations.
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