US 7,348,260 B2
Method for forming a relaxed or pseudo-relaxed useful layer on a substrate
Bruno Ghyselen, Seyssinet-Pariset (France)
Assigned to S.O.I.Tec Silicon on Insulator Technologies, Bernin (France)
Filed on Jul. 13, 2005, as Appl. No. 11/181,414.
Application 11/181414 is a continuation of application No. PCT/IB2004/000931, filed on Mar. 01, 2004.
Application PCT/IB2004/000931 is a continuation in part of application No. 10/784017, filed on Feb. 20, 2004, abandoned.
Claims priority of provisional application 60/483479, filed on Jun. 26, 2003.
Claims priority of application No. 03 02519 (FR), filed on Feb. 28, 2003.
Prior Publication US 2005/0250294 A1, Nov. 10, 2005
Int. Cl. H01L 21/30 (2006.01); H01L 21/46 (2006.01)
U.S. Cl. 438—458  [438/455; 257/E21.129; 257/E21.568; 257/E21.57] 26 Claims
OG exemplary drawing
 
1. A method for forming a relaxed or pseudo-relaxed useful layer on a substrate which comprises:
growing at least one strained semiconductor layer on a donor substrate that includes a buffer layer, with the strained semiconductor layer grown on the buffer layer;
directly bonding a receiver substrate to the strained semiconductor layer by a vitreous layer of a material that becomes viscous above a certain viscosity temperature to form a first structure;
detaching the donor substrate and buffer layer from the first structure to form a second structure comprising the receiver substrate, the vitreous layer, and the strained layer; and
heat treating the second structure at a temperature and time sufficient to relax strains in one or more of the layers of the strained semiconductor layer to form a relaxed or pseudo-relaxed useful layer on the receiver substrate.