| US 7,509,611 B2 | ||
| Heuristic clustering of circuit elements in a circuit design | ||
| Mark S. Fredrickson, Rochester, Minn. (US); Glen Howard Handlogten, Rochester, Minn. (US); and Chad B. McBride, Rochester, Minn. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Feb. 07, 2006, as Appl. No. 11/348,970. | ||
| Prior Publication US 2007/0186199 A1, Aug. 09, 2007 | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—7 [716/2; 716/4; 716/10; 716/18] | 12 Claims |
| 1. A method of clustering circuit elements in a circuit design, the method comprising:
grouping a plurality of circuit elements in a circuit design into a plurality of size balanced clusters;
heuristically optimizing a spatial locality metric for the plurality of circuit elements by iteratively:
performing a swap of circuit elements between clusters among the plurality of clusters;
calculating the spatial locality metric after performing the swap; and
selectively discarding the swap based upon the calculated spatial locality metric; and
terminating iteration of the heuristic optimization after reaching an endpoint; wherein each cluster is associated with a desired centroid, wherein the spatial locality metric is based at least in part
upon a distance from a circuit element to the desired centroid of a cluster, wherein the desired centroid for each cluster
defines a position along an axis defined in a layout of the circuit design, and wherein the spatial locality metric is based
at least in part upon a distance from a circuit element to the desired centroid of a cluster along the axis.
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