| US 7,507,659 B2 | ||
| Fabrication process of a semiconductor device | ||
| Nobuyuki Ohtsuka, Kawasaki (Japan); Noriyoshi Shimizu, Kawasaki (Japan); and Yoshiyuki Nakao, Kawasaki (Japan) | ||
| Assigned to Fujitsu Microelectronics Limited, Tokyo (Japan) | ||
| Filed on Nov. 13, 2007, as Appl. No. 11/939,064. | ||
| Claims priority of application No. 2006-307050 (JP), filed on Nov. 13, 2006. | ||
| Prior Publication US 2008/0113506 A1, May 15, 2008 | ||
| Int. Cl. H01L 21/4763 (2006.01) | ||
| U.S. Cl. 438—643 [438/687; 257/E21.49] | 12 Claims |
| 1. A method for fabricating a semiconductor device, comprising:
forming an opening defined by an inner wall surface in an insulation film;
covering said inner wall surface with a Cu—Mn alloy layer;
depositing a first Cu layer over said Cu—Mn alloy layer without exposing said Cu—Mn alloy layer to the air;
depositing a second Cu layer over said first Cu layer and filling said opening with said second Cu layer; and
forming a barrier layer over said inner wall surface as a result of a reaction between Mn in said Cu—Mn alloy layer and said
insulation film.
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