| US 7,507,650 B2 | ||
| Process for producing Schottky junction type semiconductor device | ||
| Tomonori Nakamura, Yokosuka (Japan); Hidekazu Tsuchida, Yokosuka (Japan); and Toshiyuki Miyanagi, Yokosuka (Japan) | ||
| Assigned to Central Research Institute of Electric Power Industry, Tokyo (Japan) | ||
| Appl. No. 10/594,044 PCT Filed Mar. 25, 2005, PCT No. PCT/JP2005/005530 § 371(c)(1), (2), (4) Date Sep. 25, 2006, PCT Pub. No. WO2005/093840, PCT Pub. Date Oct. 06, 2005. |
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| Claims priority of application No. 2004-092660 (JP), filed on Mar. 26, 2004. | ||
| Prior Publication US 2007/0134897 A1, Jun. 14, 2007 | ||
| Int. Cl. H01L 21/28 (2006.01) | ||
| U.S. Cl. 438—570 [257/E21.047] | 7 Claims |

| 1. A process for producing a Schottky junction type semiconductor device, comprising forming a Schottky electrode on a surface of a silicon carbide epitaxial layer, wherein a Schottky electrode made of molybdenum, tungsten, or an alloy thereof is formed on the surface of the silicon carbide epitaxial layer and is subjected to heat treatment so as to induce an alloying reaction at an interface of the silicon carbide epitaxial layer and the Schottky electrode, thereby forming an alloy layer at the interface, whereby the height of a Schottky barrier is controlled in the range of 1.0 to 1.3 eV while maintaining an n-factor at a value of 1.05 or lower. |