| US 7,505,752 B1 | ||
| Receiver for differential and reference-voltage signaling with programmable common mode | ||
| William B. Andrews, Emmaus, Pa. (US); and John Schadt, Bethlehem, Pa. (US) | ||
| Assigned to Lattice Semiconductor Corporation, Hillsboro, Oreg. (US) | ||
| Filed on Jul. 25, 2005, as Appl. No. 11/189,067. | ||
| Int. Cl. H04B 1/16 (2006.01); H04B 1/28 (2006.01) | ||
| U.S. Cl. 455—334 [455/130; 455/333] | 19 Claims |
| 1. A receiver (e.g., 100) comprising:
a first receiver circuit (e.g., 108) adapted to receive a first input signal (e.g., I) and a second input signal (e.g., IN) and generate in response thereto
a first intermediate signal (e.g., OUTA) and a second, intermediate signal (e.g., OUTAN);
a second receiver circuit (e.g., 106) adapted to receive the first input signal and the second input signal and generate in response thereto a third intermediate
signal (e.g., OUTB) and a fourth intermediate signal (e.g., OUTBN); and
a mixer circuit (e.g., 110) adapted to combine (i) the first and third intermediate signals to generate a first output signal (e.g., OUT) and (ii) the
second and fourth intermediate signals to generate a second output signal (e.g., OUTN), wherein:
the first and second receiver circuits effectively operate over different ranges of common-mode voltages.
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