| US 7,502,823 B2 | ||
| Apparatus and method for building distributed fault-tolerant/high-availability computer applications | ||
| Ashwani Garg, Los Angeles, Calif. (US); Akshay Ramesh Kadam, Los Angeles, Calif. (US); Pradeep Malhotra, Los Angeles, Calif. (US); Sagar Jogadhenu Pratap, Los Angeles, Calif. (US); and Chirayu Patel, Los Angeles, Calif. (US) | ||
| Assigned to Intel Corporation, Santa Clara, Calif. (US) | ||
| Filed on Feb. 02, 2005, as Appl. No. 11/50,588. | ||
| Application 11/050588 is a continuation of application No. 09/608888, filed on Jun. 30, 2000, granted, now 6,865,591. | ||
| Prior Publication US 2005/0193229 A1, Sep. 01, 2005 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G06F 15/16 (2006.01) | ||
| U.S. Cl. 709—203 [709/217; 709/219] | 20 Claims |
| 1. A distributed processing system comprising:
an application to execute a process in a pure distributed mode, wherein the process is associated with an incoming event and
is mapped to a resource set;
a router to route communications between the application and another application independent of location of the applications;
an update module to provide distributed functionality in the application; and
a load distributor to distribute the process to the application.
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