US 7,500,049 B2
Providing a backing store in user-level memory
Martin Dixon, Portland, Oreg. (US); Michael Cornaby, Hillsboro, Oreg. (US); Michael Fetterman, Cambourne (United Kingdom); and Per Hammarlund, Hillsboro, Oreg. (US)
Assigned to Intel Corporation, Santa Clara, Calif. (US)
Filed on Oct. 31, 2005, as Appl. No. 11/263,628.
Prior Publication US 2007/0101076 A1, May 03, 2007
Int. Cl. G06F 12/00 (2006.01)
U.S. Cl. 711—101  [711/122; 712/225] 26 Claims
OG exemplary drawing
 
1. A method comprising:
allocating a portion of a memory to be a backing store for architectural state information of a processor, wherein the architectural state information includes extended state information of which an operating system (OS) is unaware, the extended state information corresponding to an extended processor feature unsupported by the OS, including receiving a pointer corresponding to a starting address for the backing store from the OS, wherein the backing store resides in user-level memory; and
storing the architectural state information in the backing store via an application and without OS involvement.