US 7,499,507 B2
Synchronization module using a Viterbi slicer for a turbo decoder
Steven T. Jaffe, Irvine, Calif. (US); Kelly B. Cameron, Irvine, Calif. (US); and Christopher R. Jones, Los Angeles, Calif. (US)
Assigned to Broadcom Corporation, Irvine, Calif. (US)
Filed on Dec. 04, 2000, as Appl. No. 9/729,443.
Claims priority of provisional application 60/168809, filed on Dec. 03, 1999.
Prior Publication US 2002/0067779 A1, Jun. 06, 2002
Int. Cl. H03D 1/00 (2006.01)
U.S. Cl. 375—341  [375/326; 375/344; 375/293; 375/354; 375/364; 455/119; 348/735] 54 Claims
OG exemplary drawing
 
52. An apparatus, comprising:
a first communication device that includes a turbo encoder having:
a first trellis encoder that is operable to encode data thereby generating first encoded data;
an interleaver that is operable to interleave the data thereby generating interleaved data;
a second trellis encoder that is operable to encode the interleaved data thereby generating interleaved encoded data;
an inverse interleaver that is operable to unscramble the interleaved encoded data that has been generated by the second trellis encoder thereby generating second encoded data; and
a switch that is operable alternatively to select symbols from the first encoded data and the second encoded data; and
a second communication device, coupled to the first communication device via a communication channel, that receives a signal that includes the first encoded data and the second encoded data and that includes a turbo decoder, a multiplier, and a synchronization module, wherein:
the multiplier is operable to multiply the signal by a mixing frequency to match a carrier frequency of the signal to assist in recovery of a first symbol, a second symbol, and a third symbol from the signal;
the synchronization module includes a Viterbi decoder, a phase detector, and a voltage controlled oscillator, wherein:
the Viterbi decoder and the phase detector each receive the mixed signal output from the multiplier;
the output of the Viterbi decoder is provided to the phase detector;
the synchronization module is operable to recover the first symbol, the second symbol, and the third symbol from the signal such that the first symbol is followed by the second symbol and the second symbol is followed by the third symbol;
the Viterbi decoder is operable to consider the first symbol when estimating the second symbol;
the Viterbi decoder is operable to consider the first symbol and the second symbol when estimating the third symbol;
the Viterbi decoder operating with a zero traceback depth;
the phase detector is operable to employ at least one of the first symbol, the second symbol, and the third symbol to determine whether recovery of symbols from the signal, as performed by the synchronization module, is lagging or leading actual symbols within the signal and to adjust the voltage controlled oscillator based on any lagging or leading; and
the adjustment of the mixing frequency by the voltage controlled oscillator is operable to make the mixing frequency to be substantially equal to the carrier frequency of the signal; and
the turbo decoder is operable to decode the first symbol, the second symbol, and the third symbol that are provided from the synchronization module to make best estimates of information bits encoded therein.