US 7,499,345 B2
Non-volatile memory implemented with low-voltages transistors and related system and method
Giovanni Campardo, Via F. Rillosi, 9, I-24128 Bergamo (BG) (Italy); Rino Micheloni, Via Como, 8, I-22078 Turate (CO) (Italy); Luca Crippa, Via Manzoni, 66, I-20040 Busnago (MI) (Italy); Giancarlo Ragone, Vico 3° Micaré, 43, I-89047 Roccella Jonica (RC) (Italy); and Miram Sangalli, Via XXV Aprile, 11D, I-20061 Carugate (MI) (Italy)
Filed on Nov. 27, 2006, as Appl. No. 11/605,209.
Claims priority of application No. 05111284 (EP), filed on Nov. 25, 2005; application No. 06111337 (EP), filed on Mar. 17, 2006; application No. 06111477 (EP), filed on Mar. 21, 2006; application No. 06112526 (EP), filed on Apr. 12, 2006; application No. 06113480 (EP), filed on May 04, 2006; application No. 06119440 (EP), filed on Aug. 24, 2006; and application No. 06119456 (EP), filed on Aug. 24, 2006.
Prior Publication US 2008/0018380 A1, Jan. 24, 2008
Int. Cl. G11C 5/14 (2006.01); G11C 16/04 (2006.01); G05F 3/24 (2006.01)
U.S. Cl. 365—189.09  [365/185.18; 365/226; 327/537; 327/543] 38 Claims
OG exemplary drawing
 
1. An electronic apparatus including:
a supplying block for supplying a plurality of operative voltages;
at least one operative circuit; and
a distribution bus for distributing at least part of the operative voltages to each operative circuit,
wherein each operative circuit includes a set of devices for generating a set of output voltages from a set of input voltages of the distributed operative voltages, the input and output voltages spanning an effective range, each device being capable of sustaining at most a safe voltage between each pair of terminals thereof not higher than the effective range, and wherein the devices are controlled by a set of auxiliary voltages of the distributed operative voltages spanning an auxiliary range within the effective range so that a difference between the voltages applied to each pair of terminals thereof is not higher than the safe voltage.