US 7,499,305 B2
Semiconductor device and driving method of the same
Ryoji Nomura, Yamato (Japan); Hiroko Abe, Setagaya (Japan); Yuji Iwaki, Atsugi (Japan); and Shunpei Yamazaki, Setagaya (Japan)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (Japan)
Appl. No. 11/547,304
PCT Filed Oct. 12, 2005, PCT No. PCT/JP2005/019156
§ 371(c)(1), (2), (4) Date Oct. 04, 2006,
PCT Pub. No. WO2006/043573, PCT Pub. Date Apr. 27, 2006.
Claims priority of application No. 2004-303595 (JP), filed on Oct. 18, 2004.
Prior Publication US 2007/0153565 A1, Jul. 05, 2007
Int. Cl. G11C 11/00 (2006.01)
U.S. Cl. 365—148  [365/189.01] 37 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a bit line extending in a first direction;
a word line extending in a second direction that is different from the first direction;
a memory cell provided at an intersecting portion of the bit line and the word line; and
a memory element provided in the memory cell,
wherein the memory element comprises an organic compound layer disposed between the bit line and the word line, and
wherein the memory element is arranged to change a distance between the bit line and the word line when a voltage is applied between the bit line and the word line.