| US 7,498,667 B2 | ||
| Stacked integrated circuit package-in-package system | ||
| Jong-Woo Ha, Seoul (Korea, Republic of); Gwang Kim, Kyoungki-do (Korea, Republic of); and JuHyun Park, Seoul (Korea, Republic of) | ||
| Assigned to Stats Chippac Ltd., Singapore (Singapore) | ||
| Filed on Apr. 18, 2006, as Appl. No. 11/379,106. | ||
| Prior Publication US 2007/0241453 A1, Oct. 18, 2007 | ||
| Int. Cl. H01L 23/02 (2006.01); H01L 23/48 (2006.01) | ||
| U.S. Cl. 257—686 [257/787; 257/723; 257/E23.178; 257/784] | 20 Claims |
| 1. A stacked integrated circuit package-in-package system comprising:
forming a first integrated circuit package having a first peripheral contact;
forming a second integrated circuit package having a second peripheral contact;
stacking the second integrated circuit package on the first integrated circuit package in a multidirectional offset stack
configuration with the first peripheral contact exposed, the multidirectional offset stack configuration provides a second
package overhang with the second integrated circuit package above the first integrated circuit package;
electrically connecting the first peripheral contact and a package substrate contact along a package first edge; and
electrically connecting the second peripheral contact and a package substrate contact along a package second edge.
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