| US 7,498,633 B2 | ||
| High-voltage power semiconductor device | ||
| James A. Cooper, West Lafayette, Ind. (US); and Asmita Saha, Hillsboro, Oreg. (US) | ||
| Assigned to Purdue Research Foundation, West Lafayette, Ind. (US) | ||
| Filed on Jan. 23, 2006, as Appl. No. 11/338,007. | ||
| Claims priority of provisional application 60/646152, filed on Jan. 21, 2005. | ||
| Prior Publication US 2006/0192256 A1, Aug. 31, 2006 | ||
| Int. Cl. H01L 29/94 (2006.01) | ||
| U.S. Cl. 257—341 [257/263; 257/256] | 15 Claims |

| 1. A metal-oxide semiconductor field-effect transistor comprising:
a silicon-carbide substrate having a first concentration of first type impurities;
a drift semiconductor layer formed on a front side of the semiconductor substrate and having a second concentration of first
type impurities less than the first concentration of first type impurities;
a current spreading semiconductor layer formed on a front side of the drift semiconductor layer;
a first source region;
a second source region;
a JFET region formed on a front side of the current spreading semiconductor layer and defined between the first source region
and the second source region, the JFET region having a third concentration of first type impurities that is greater than the
second concentration of first type impurities;
a plurality of source regions; and
a plurality of base contact regions,
wherein the plurality of source regions and the plurality of base contact regions form alternating strips of N-type doped
regions and P-type doped regions, the alternating strips being substantially orthogonal to respective source electrodes formed
over the first and the second source regions.
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