| US 7,496,786 B2 | ||
| Systems and methods for maintaining lock step operation | ||
| Simon Graham, Bolton, Mass. (US); Dan Lussier, Holliston, Mass. (US); Tim Wegner, Westborough, Mass. (US); Jeffrey Somers, Northboro, Mass. (US); Steven Haid, Bolton, Mass. (US); and John W. Edwards, Jr., Lake Worth, Fla. (US) | ||
| Assigned to Stratus Technologies Bermuda Ltd., Hamilton (Bermuda) | ||
| Filed on Jan. 10, 2006, as Appl. No. 11/329,244. | ||
| Prior Publication US 2007/0174687 A1, Jul. 26, 2007 | ||
| Int. Cl. G06F 11/00 (2006.01) | ||
| U.S. Cl. 714—12 [714/6] | 10 Claims |
| 1. A microsync method of returning a fault tolerant system to lock step operation, the fault tolerant system having two processing
subsystems, the method comprising the steps of:
detecting an error, the error corresponding to an out of lock event in the fault tolerant system;
halting processing in the two processing subsystems;
waiting for a delay period, the delay period set to allow for a declaration of a hardware error;
setting processing subsystem priority after the delay period such that one processing subsystem is primary and one processing
subsystem is secondary;
copying processor state information for the primary subsystem to the secondary subsystem; and
returning the primary subsystem and the secondary subsystem to normal operation within a re-sync period.
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