| US 7,496,133 B2 | ||
| Multi-rate on-chip OCN filter for a transceiver system | ||
| Ichiro Fujimori, Irvine, Calif. (US); Mario Caresosa, Rancho Santa Margarita, Calif. (US); and Namik Kocaman, Irvine, Calif. (US) | ||
| Assigned to Broadcom Corporation, Irvine, Calif. (US) | ||
| Filed on Nov. 19, 2002, as Appl. No. 10/299,892. | ||
| Claims priority of provisional application 60/423070, filed on Nov. 01, 2002. | ||
| Claims priority of provisional application 60/423166, filed on Nov. 01, 2002. | ||
| Claims priority of provisional application 60/423294, filed on Nov. 01, 2002. | ||
| Claims priority of provisional application 60/423071, filed on Nov. 01, 2002. | ||
| Claims priority of provisional application 60/423072, filed on Nov. 01, 2002. | ||
| Claims priority of provisional application 60/423074, filed on Nov. 01, 2002. | ||
| Claims priority of provisional application 60/423034, filed on Nov. 01, 2002. | ||
| Prior Publication US 2004/0105410 A1, Jun. 03, 2004 | ||
| Int. Cl. H04B 1/38 (2006.01) | ||
| U.S. Cl. 375—219 | 26 Claims |
| 1. In a transceiver chip used in high-speed serial data communications, apparatus to aid said transceiver chip in receiving
data at multiple data rates, said apparatus comprising:
at least one multi-rate filter stage within said transceiver chip to generate a filtered serial data signal from a received
serial data signal; and
a limiter stage within said transceiver chip to generate a full-swing serial data signal from said filtered serial data signal,
said at least one multi-rate rate filter stage comprises at least one passive R-C circuit within said transceiver chip, wherein
a capacitance value of said at least one passive R-C circuit is determined by a variable capacitor implemented within said
transceiver chip as an N-MOS transistor in an N-well.
|