| US 7,494,863 B2 | ||
| Method for manufacturing capacitor for semiconductor device | ||
| Chang Hun Han, Icheon-si (Korea, Republic of) | ||
| Assigned to Dongbu Electronics Co., Ltd., Seoul (Korea, Republic of) | ||
| Filed on Jul. 13, 2006, as Appl. No. 11/485,361. | ||
| Claims priority of application No. 10-2005-0063734 (KR), filed on Jul. 14, 2005. | ||
| Prior Publication US 2007/0020869 A1, Jan. 25, 2007 | ||
| Int. Cl. H01L 21/8234 (2006.01); H01L 21/8244 (2006.01) | ||
| U.S. Cl. 438—238 [438/210; 438/253; 438/381; 438/396; 257/E21.008; 257/E21.648] | 6 Claims |
| 1. A method for manufacturing a capacitor in a semiconductor device, comprising:
forming a lower electrode on a semiconductor substrate;
forming a dielectric layer on an entire surface of the semiconductor substrate, covering the lower electrode;
forming a first interlevel dielectric layer on the dielectric layer;
selectively removing the first interlevel dielectric layer to form an opening exposing a surface of the dielectric layer without
exposing the lower electrode;
forming a conductive layer over the entire surface of the semiconductor substrate including the opening;
planarizing the conductive layer to form an upper electrode in the opening; and
forming a second interlevel dielectric layer over the entire surface of the semiconductor substrate including the upper electrode.
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