| US 7,333,032 B1 | ||
| System, method and computer program product for word-level computations and storage | ||
| Venky Ramachandran, Cupertino, Calif. (US); and Malay Haldar, Noida (India) | ||
| Assigned to Calypto Design Systems, Inc., Santa Clara, Calif. (US) | ||
| Filed on Jan. 20, 2006, as Appl. No. 11/335,928. | ||
| Int. Cl. H03M 7/00 (2006.01) | ||
| U.S. Cl. 341—50 [341/51] | 29 Claims |
| 1. A method, comprising:
receiving a plurality of values associated with an ordered collection of bits;
determining which of the values are the same;
generating a compressed data structure including the values, based on the determination; and
generating a plurality of resulting values based on one or more arithmetic or logical operations performed on the plurality
of values associated with the ordered collection of bits;
wherein the ordered collection of bits is associated with a register transfer level (RTL) design.
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