| US 7,332,943 B2 | ||
| Method and circuit for controlling a PWM power stage | ||
| Edoardo Botti, Vigevano (Italy); and Juri Cambieri, Opera (Italy) | ||
| Assigned to STMicroElectronics S.r.l., Agrate Brianza (Italy) | ||
| Filed on Sep. 25, 2006, as Appl. No. 11/534,803. | ||
| Claims priority of application No. VA2005A0054 (IT), filed on Sep. 23, 2005. | ||
| Prior Publication US 2007/0071086 A1, Mar. 29, 2007 | ||
| Int. Cl. H03B 1/00 (2006.01) | ||
| U.S. Cl. 327—112 | 16 Claims |
| 1. A method for controlling a PWM power stage comprising at least two MOS transistors of opposite conductivity coupled between
an output node of the PWM power stage and respective positive and negative supply lines; and respective free-wheeling diodes,
the method comprising:
dampening current peaks generated by switching of the PWM power stage by
forming the at least two MOS transistors such that their reverse conduction threshold voltage is smaller than a sum between
their forward conduction threshold voltage and a forward voltage on the respective free-wheeling diode at which a pre-established
current flows therethrough, and
setting the at least two MOS transistors in a high impedance state by biasing respective control nodes at a turnoff voltage
such that their gate-source voltage is between the forward conduction threshold voltage and a null voltage.
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