| US 7,493,581 B2 | ||
| Analytical placement method and apparatus | ||
| Andrew Siegel, Shoreline, Wash. (US); Steven Teig, Menlo Park, Calif. (US); and Hussein Etawil, Santa Clara, Calif. (US) | ||
| Assigned to Cadence Design Systems, Inc., San Jose, Calif. (US) | ||
| Filed on Mar. 06, 2006, as Appl. No. 11/370,245. | ||
| Application 11/370245 is a continuation of application No. 10/236463, filed on Sep. 06, 2002, granted, now 7,058,913. | ||
| Claims priority of provisional application 60/317867, filed on Sep. 06, 2001. | ||
| Prior Publication US 2006/0236291 A1, Oct. 19, 2006 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—9 [716/10; 716/12; 716/13] | 22 Claims |
| 1. An analytical placement method for identifying locations of circuit elements in a region of a layout, the method comprising:
a) formulating an objective function that accounts for diagonal wiring during routing;
b) solving the objective function to identify the locations of the circuit elements to be placed, wherein the objective function
is continuously differentiable along at least a portion of a domain over which the objective function is defined.
|