at least one matrix switch port; and

a controller card configured to recognize communication protocols associated with any of a first format including parallel data at a first speed and at a first voltage, a second format including parallel data at a speed greater than said first speed and at a voltage distinct from said first voltage, a third format including parallel data at a third speed distinct from said first speed and at a third distinct voltage, a fourth format including serial data at a distinct speed from said first, second and third speeds and at a fourth distinct voltage, a fifth format including serial data at a fifth speed distinct from said first, second and third speeds and at a fifth distinct voltage, a sixth format including serial data at a sixth distinct speed, a seventh format including serial data at a seventh distinct speed, an eighth format including parallel data at an eighth distinct speed from said first, second, and third speeds and at a voltage distinct from said first, second, fourth and fifth voltages, and a ninth format including serial data at a ninth speed, wherein said controller card includes logic chips and circuitry comprising an input signal interface, a control logic interface, an output signal interface, and a communication bus, wherein the logic chips and circuitry are externally programmed by a digital logic program that:

i) multiplexes data streams of said first-ninth formats;

ii) converts the multiplexed data stream to an optical signal; and

iii) transmits the optical signal