| US 7,492,912 B2 | ||
| Multi-channel speaker system and a connection system thereof | ||
| Yun Mo Chung, Sungwon apt. 708-1201, Cheongsol maeul, Geumgok-dong, Bundang-gu, Seongnam-city, Gyeonggi-do 463-718 (Korea, Republic of); and Moon Vin Song, Yongin-si (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., (Korea, Republic of); and Yun Mo Chung, (Korea, Republic of) | ||
| Appl. No. 10/554,431 PCT Filed Mar. 18, 2004, PCT No. PCT/KR2004/000593 § 371(c)(1), (2), (4) Date Dec. 18, 2006, PCT Pub. No. WO2004/084584, PCT Pub. Date Sep. 30, 2004. |
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| Claims priority of application No. 10-2003-0016890 (KR), filed on Mar. 18, 2003. | ||
| Prior Publication US 2007/0106404 A1, May 10, 2007 | ||
| Int. Cl. H04B 3/00 (2006.01); H04R 29/00 (2006.01) | ||
| U.S. Cl. 381—77 [381/59] | 8 Claims |

| 1. A wiring device of a multi-channel speaker system that operates a plurality of speakers with different sound range signal
values by connecting a main audio body and the plurality of speakers, comprising:
a serial audio signal circuit SAC; and
audio signal separating circuits ADC that are provided in each of the plurality of speakers,
wherein the serial audio signal circuit SAC comprises:
an analog/digital converter A/D for converting a plurality of analog signals that are generated by the main audio body to
digital signals,
a multi-channel control signal synthesizer SC for synthesizing the plurality of digital signals into a single digital audio
signal,
a clock generator CG for providing a reference clock to the synthesized digital audio signal,
a digital signal synthesizer DG for synchronizing each of the digital audio signals according to the reference clock generated
by the clock generator,
a serial signal output member SO for converting the synchronized digital audio signal to a serial digital audio signal and
outputting the serial digital audio signal, and
a single wire extended from the serial signal output member SO; and
wherein the audio signal separating circuit ADC comprises:
a multi-channel separator for separating a digital signal corresponding to the reference clock generated by the clock generator
CG from the input serial digital audio signal, and
a digital/analog converter D/A for converting the separated digital signal to an analog signal.
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