an interface unit for performing an interface function with an external monitoring device;

a codec field-programmable gate array (FPGA) unit for coding and decoding (CODEC) functions;

a modem FPGA unit for modulating and demodulating (MODEM) functions;

a dual port random access memory (DPRAM) unit for performing a high speed interface function between a controller and the codec FPGA unit for CODEC;

a memory unit for performing a high speed interface function between the codec FPGA unit and the modem FPGA unit;

a digital intermediate frequency (IF) unit for filtering a digital signal inputted from the modem FPGA, up-converting the frequency of the signal, converting the signal into an analogue signal, and transmitting the analogue signal to an external radio frequency (RF) unit through multi-paths, the digital IF unit for converting the analogue signal inputted from the RF unit into the digital signal, filtering the digital signal, and down-converting the frequency of the data signal;

a clock/power source regenerator for supplying a system clock signal received from the RF unit and supplying a power source received from an external GPS/power source supply; and

the controller for controlling the interface unit, the codec FPGA unit, the modem FPGA unit, the DPRAM unit, and the memory unit so as to process a multi-band and multi-carrier signal.