| US 7,492,642 B2 | ||
| Flash memory device capable of reduced programming time | ||
| Ji-Ho Cho, Suwon-si (Korea, Republic of); and Myong-Jae Kim, Suwon-si (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
| Filed on Mar. 31, 2008, as Appl. No. 12/58,843. | ||
| Application 12/058843 is a division of application No. 11/302440, filed on Dec. 14, 2005, granted, now 7,417,896. | ||
| Claims priority of application No. 2004-105622 (KR), filed on Dec. 14, 2004. | ||
| Prior Publication US 2008/0181011 A1, Jul. 31, 2008 | ||
| Int. Cl. G11C 11/34 (2006.01); G11C 16/04 (2006.01); G11C 16/06 (2006.01) | ||
| U.S. Cl. 365—185.23 [365/185.18; 365/185.28] | 12 Claims |
| 1. A flash memory device, comprising:
a word line voltage generator circuit configured to generate a word line voltage, wherein the word line voltage is varied
in accordance with an increment size; and,
a program controller circuit adapted to control the word line voltage generator circuit and further adapted to define a unit
program time for the word line voltage in accordance with a number of program data bits in a set of input data bits.
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